This invention relates to electronic circuits for providing an output signal having a frequency twice that of the input signal.
Frequency doublers are known in the prior art and are used to provide an output signal which has a frequency having twice the frequency of an input signal. Frequency doublers have long been used in radio frequency work; for example, to provide a high-frequency signal which is generated from a crystal or other oscillator having a lower frequency. These require components whose values and tolerances are not readily reproducible in silicon MOS technology.
Frequency doublers can also be constructed utilizing phase lock loops. Use of phase lock loops requires complex circuitry which requires large areas on silicon and results in jitter (i.e., slight, but undesirable, shifts in frequency) in the final output signal. Frequency doublers using phase lock loop are described, for example, in "Phase Lock Techniques" p.78, F. M. Gardner, John Wiley & Sons, Inc. 1966, which is hereby incorporated by reference.